IAR Embedded Workbench Available For Renesas MCUs
IAR Systems has announced that the IAR Embedded Workbench is now available for Renesas's SH-2A and SH2A-FPU microcontroller (MCU) architectures. The IAR Embedded Workbench for SuperH is a set of embedded development tools for applications employing the Renesas SH-2A and SH2A-FPU ranges of devices. The toolset comprises the IAR C/C++ Compiler, an assembler, a linker, a librarian, a text editor, a project manager and the IAR C-Spy Debugger in a single integrated development environment.
The IAR C/C++ Compiler delivers reliable compiled code, according to the company. Recent benchmarks show that the IAR C/C++ Compiler for SuperH generates faster and more compact code than competing compilers. Using a number of real-world applications, the IAR C/C++ Compiler generated 7.9 per cent faster and 14.3 per cent smaller code when compared to Renesas's own compiler.
The compiler's built-in FPU support guarantees that the best floating point instruction performance is reached without the need for any time-consuming assembly coding by hand. For SH-2A devices without an FPU, a floating-point software library is included. The IAR C-Spy Debugger includes support for the Renesas E10A-USB probe for on-chip debugging and allows the emulator's trace system to be utilised.
With a number of features, trace data on instruction level or function call level can be used to resolve difficult problems in addition to fine-tuning the application for improved performance. The IAR C-Spy Debugger also features a built-in instruction set simulator for early development and software testing. Third-party debuggers developed by partners of IAR Systems can also be utilised thanks to the wide variety of output formats generated by the linker.
The IAR C/C++ Compiler delivers reliable compiled code, according to the company. Recent benchmarks show that the IAR C/C++ Compiler for SuperH generates faster and more compact code than competing compilers. Using a number of real-world applications, the IAR C/C++ Compiler generated 7.9 per cent faster and 14.3 per cent smaller code when compared to Renesas's own compiler.
The compiler's built-in FPU support guarantees that the best floating point instruction performance is reached without the need for any time-consuming assembly coding by hand. For SH-2A devices without an FPU, a floating-point software library is included. The IAR C-Spy Debugger includes support for the Renesas E10A-USB probe for on-chip debugging and allows the emulator's trace system to be utilised.
With a number of features, trace data on instruction level or function call level can be used to resolve difficult problems in addition to fine-tuning the application for improved performance. The IAR C-Spy Debugger also features a built-in instruction set simulator for early development and software testing. Third-party debuggers developed by partners of IAR Systems can also be utilised thanks to the wide variety of output formats generated by the linker.
Comments