Agilent Technologies Introduces 2.8-Gb/sec Entry-Level Option for Industry's Fastest Logic Analyzer
Agilent Technologies Inc. (NYSE: A) today introduced a new lower-priced entry-level 1.4-Gb/sec state mode option for the industry's fastest logic analyzer, the Agilent U4154A.
The new option combines a state capture speed of 2.8 Gb/sec on 68 channels and 1.4 Gb/sec on 136 channels with scanning at 20 ps and 20 mV resolution, providing reliable capture data on eye openings as small as 160 ps by 160 mV.
When engineers require higher state mode data rates, they can upgrade to achieve state captures of 4 Gb/sec on 68 channels and 2.5 Gb/sec on 136 channels. These capabilities enable engineers to measure the increasingly fast digital signals used in emerging technologies.
The Agilent U4154A AXIe-based logic analyzer module and associated probes and powerful analysis software provide essential capabilities for engineers working with DDR (double data rate) and low-power DDR memory systems, high-speed application-specific integrated chips, analog-to-digital converters and field-programmable gate arrays operating at speeds up to 4 Gb/sec.
The industry's highest trigger sequencer speeds - 1.4 GHz with Option 01G and 2.5 GHz with Option 02G - give engineers the ability to trigger reliably on sequential events without having to give up triggering flexibility.
"The U4154A logic analyzer is an ideal tool for DDR memory measurement and debug work because it gives engineers confidence in state-mode captures and insight into bus-level signal integrity," said Perry Keller, Agilent's representative on the Joint Electronic Devices Engineering Council board of directors and several JEDEC DDR committees.
Being able to validate signal integrity at high speeds becomes critical for reliable performance. The exclusive eye-scan capability of the U4154A gives engineers a quick overview of signal integrity on all signals of a DDR system in a fraction of the time it would take using alternative methods. Identifying problem signals with the U4154A saves time and allows engineers to concentrate their oscilloscope probing on the signals of most concern.
Complementing state measurements, timing zoom with 80-ps timing resolution and 256 K-sample memory depth gives designers more insight into problems by allowing simultaneous state and high-resolution timing measurements over a 20-us time span. The U4154A also offers 2.5-GHz and 5-GHz timing and transitional timing modes in full and half channels respectively.
The new option combines a state capture speed of 2.8 Gb/sec on 68 channels and 1.4 Gb/sec on 136 channels with scanning at 20 ps and 20 mV resolution, providing reliable capture data on eye openings as small as 160 ps by 160 mV.
When engineers require higher state mode data rates, they can upgrade to achieve state captures of 4 Gb/sec on 68 channels and 2.5 Gb/sec on 136 channels. These capabilities enable engineers to measure the increasingly fast digital signals used in emerging technologies.
The Agilent U4154A AXIe-based logic analyzer module and associated probes and powerful analysis software provide essential capabilities for engineers working with DDR (double data rate) and low-power DDR memory systems, high-speed application-specific integrated chips, analog-to-digital converters and field-programmable gate arrays operating at speeds up to 4 Gb/sec.
The industry's highest trigger sequencer speeds - 1.4 GHz with Option 01G and 2.5 GHz with Option 02G - give engineers the ability to trigger reliably on sequential events without having to give up triggering flexibility.
"The U4154A logic analyzer is an ideal tool for DDR memory measurement and debug work because it gives engineers confidence in state-mode captures and insight into bus-level signal integrity," said Perry Keller, Agilent's representative on the Joint Electronic Devices Engineering Council board of directors and several JEDEC DDR committees.
Being able to validate signal integrity at high speeds becomes critical for reliable performance. The exclusive eye-scan capability of the U4154A gives engineers a quick overview of signal integrity on all signals of a DDR system in a fraction of the time it would take using alternative methods. Identifying problem signals with the U4154A saves time and allows engineers to concentrate their oscilloscope probing on the signals of most concern.
Complementing state measurements, timing zoom with 80-ps timing resolution and 256 K-sample memory depth gives designers more insight into problems by allowing simultaneous state and high-resolution timing measurements over a 20-us time span. The U4154A also offers 2.5-GHz and 5-GHz timing and transitional timing modes in full and half channels respectively.
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