PLX Expands PCI Express Gen3 Portfolio, Adds Versatile 96-, 80-, 64-Lane Switches
“Designers are faced with a wide-variety of choices when it comes to high-speed system connectivity, and we firmly believe that PLX has engineered the best solutions with our PCI Express switches,” said Vijay Meduri, PLX executive vice president of engineering, switching group. “With consideration for established competitive technologies like InfiniBand, SAS, and Ethernet, along with new integrated PCIe architectures from major OEMs being released, designers now have more options courtesy of PLX switches and the high-performance PCI Express standard.”
New PCI Express Markets
By leveraging low latency PCIe Gen3 performance, new market opportunities are developing to help manage the massive flow of data driven mostly by today’s Internet applications. Designers are creating sophisticated solid state disk (SSD) PCIe-based architectures dedicated to store and retrieve movies, music, photos, and files.
Individual racks making up the core of data centers now have a new choice when considering fabrics for external box-to-box rack connectivity. By implementing a PCIe-based ExpressFabric®, architects can take advantage of native PCIe-based systems to increase performance and lower overall cost.
Other markets experiencing growth via PCIe include oil and gas exploration, Wall Street trade routing, test and measurement, communications, and general-purpose computation on graphics processing units (GPGPU) used to accelerate a wide range of applications like embedded systems, mobile appliances, computers, and gaming graphics.
PLX Product Features
An enhanced PLX multi-host architecture allows users to configure each device in legacy single-host mode or multi-host mode, which enables designers to build PCIe-based systems supporting high-availability, failover, redundant, and clustered systems. In multi-host mode, a virtual switch is created for each host port and its associated downstream ports inside the device. The traffic between the ports of such a virtual switch is completely isolated from the traffic in other virtual switches. The devices also employ a multi-clock domain, which allows the user to terminate spread spectrum clock (SSC)-enabled domains (supported on all ports), thus removing the need to pass a common clock across a backplane.
The PLX performancePAK™ architecture supports packet cut-through with a maximum latency of 150ns (in a x16-to-x16 configuration). This low latency, combined with large packet memory, support for a packet payload size of up to 2048 bytes, flexible common buffer/credit pool, and a non-blocking internal switch architecture, enables a full-line rate on all ports in performance-hungry applications.
PLX’s unique visionPAK™ software provides diagnostic support, including per-port performance monitoring, capturing SerDes eye width and height, a PCIe packet generator tool, and support for error injection and loopback tests. The complementary software toolkit reduces cost by getting designs to market faster and reduces test equipment overhead.
“PCIe 3.0 adoption is proliferating, with workstation and desktop computing motherboards shipping since late 2011, followed by support from major server vendors and the emergence of PCIe 3.0-capable networking and storage I/O adapters this year,” said Abhi Dugar, research manager, wired communications semiconductor research at IDC and author of Worldwide Enterprise Networks, Security Appliances, Telecommunications, and Wireless Infrastructure Semiconductor 2012–2016 Forecast. “With its broad portfolio of PCI Express-compliant switches, PLX is well positioned to take advantage of this transition to the next generation of interconnect technology.”