Lattice Announces New 32 QFN Package For MachXO2 Programmable Logic Devices
One customer that has already designed the MachXO2 device in the new 32 QFN package into its products is Arago Systems of Sophia Antipolis, France. "Our Wisnet product families of IPv6 sensor network nodes and gateways (6LoWPAN) require tiny form factor, low power consumption, industrial temperature range and low cost," said Arnault Fontebride, Chief Technical Officer of Arago Systems. "The function and flexibility of the MachXO2 PLD in the small, rugged, easy-to-manufacture 32 QFN package is a combination that fits perfectly into our demanding industrial requirements."
The MachXO2 PLD family's unique system integration benefits drive its widespread adoption in a broad range of low density applications that require general purpose I/O expansion, interface bridging and power-up management functions. Built-in system functions include hardened implementations of widely used I2C and SPI interfaces and a timer/counter in the Embedded Function Block (EFB), providing up to 429 Look Up Tables (LUT) of pre-designed, pre-verified functionality. Engineers at Arago Systems implemented the I2C interfaces in their Wisnet products, saving valuable design effort and reducing time to market.
"The widespread adoption of the MachXO2 PLD family in system and consumer applications reflects our customers' enthusiastic acceptance of low cost, low power, non-volatile PLDs to quickly bring their products to rapidly evolving markets," said Shakeel Peera, Lattice Director of Strategic Marketing. "The addition of the 32 QFN package to the MachXO2 portfolio promises to broaden its application in space-constrained, low power applications, including consumer, communications, computing, industrial and medical."