ADCs Suited for Handheld Test and Instrumentation
Linear Technology has introduced three ranges of low-power 16-bit, 25-125Msps analogue-to-digital converters (ADCs). These low-power 16-bit ADCs enable designers to upgrade performance while maintaining portability in such applications as handheld test and instrumentation, radar/LIDAR, portable medical imaging, PET/SPECT scanners, smart antenna systems and a variety of low-power communication systems.
The LTC2165 and LTC2185 ranges are single- and two-channel simultaneous sampling parallel ADCs, respectively, offering a choice of full-rate CMOS, or double data rate (DDR) CMOS/LVDS digital outputs with programmable digital output timing, programmable LVDS output current and optional LVDS output termination. The LTC2195 range includes two-channel, simultaneous sampling ADCs with serial LVDS outputs. Each ADC range offers a choice of pin-compatible converters, sampling from 25 to 125Msps and optimised for the lowest power dissipation at the rated speed.
They include such features as Linear Technology's digital output randomiser and alternate bit polarity (ABP) mode, which minimise digital feedback. The dual LTC2185/LTC2195 and single LTC2165 consume 185mW/channel at 125Msps and offer signal-to-noise-ratio (SNR) performance of 76.8dB and SFDR of 90dB at baseband. Pin-compatible speed-grade options include 25, 40, 65, 80 and 105Msps with approximate power dissipation of 1.5mW/Msps per channel. Further power savings can be achieved by placing the devices in standby (20mW) or shutdown (1mW).
Analogue full-power bandwidth of 550MHz and ultra-low jitter of 0.07psRMS allows undersampling of IF frequencies with excellent noise performance, according to the company. Available in compact QFN packages, designers can benefit from the flexible choice of interfaces that minimise pin count and ease routing to FPGAs.
The LTC2165 and LTC2185 ranges are single- and two-channel simultaneous sampling parallel ADCs, respectively, offering a choice of full-rate CMOS, or double data rate (DDR) CMOS/LVDS digital outputs with programmable digital output timing, programmable LVDS output current and optional LVDS output termination. The LTC2195 range includes two-channel, simultaneous sampling ADCs with serial LVDS outputs. Each ADC range offers a choice of pin-compatible converters, sampling from 25 to 125Msps and optimised for the lowest power dissipation at the rated speed.
They include such features as Linear Technology's digital output randomiser and alternate bit polarity (ABP) mode, which minimise digital feedback. The dual LTC2185/LTC2195 and single LTC2165 consume 185mW/channel at 125Msps and offer signal-to-noise-ratio (SNR) performance of 76.8dB and SFDR of 90dB at baseband. Pin-compatible speed-grade options include 25, 40, 65, 80 and 105Msps with approximate power dissipation of 1.5mW/Msps per channel. Further power savings can be achieved by placing the devices in standby (20mW) or shutdown (1mW).
Analogue full-power bandwidth of 550MHz and ultra-low jitter of 0.07psRMS allows undersampling of IF frequencies with excellent noise performance, according to the company. Available in compact QFN packages, designers can benefit from the flexible choice of interfaces that minimise pin count and ease routing to FPGAs.
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