Kontron To Design With Cavium Octeon II Processors

Kontron intends to design with Octeon II processors from Cavium Networks, a provider of semiconductor products that allow intelligent processing. Clients will be able to upgrade their systems with the highest packet processor performance, unprecedented scalability and added virtualisation functionalities, to support their multiple network infrastructure equipment such as media gateway- and wireless base station-type applications.

These multi-core processing units will provide much more flexibility in xTCA platforms, and create a broader range of target applications using COTS components in the network. Multiple 10GbE I/O capability combined with DDR3 memory bandwidth will enable system designs for LTE and other core network elements. SRIO is supported in the Octeon II CN63XX, so this type of architecture will also allow use in combination with other DSP-intensive applications in MicroTCA platforms.

The Cavium Networks Octeon II internet application processor (IAP) family is designed for hypernetworks serving enterprises, data centres, and access and service providers, which require support for converged data, voice and video. Octeon II applications include switches, routers, appliances, equipment for 3G, Wimax, LTE, wireless LAN, and unified storage systems and adapters. The Octeon II family integrates 1 to 32 MIPS64 cores, up to 75 application acceleration engines for quality of service, packet processing, TCP, compression, encryption, RAID, de-duplication and regular expression processing, up to 400Gbytes/s of DDR3 memory bandwidth, and up to 100Gbytes/s of network connectivity, while consuming only 2W to 60W across the entire family.

Kontron currently offers two modules: the Kontron AM4204 with four 1GbE ports to the front and software-configurable interfaces to the fabric side (PCIe, four 1GbE or XAUI), and the Kontron AM4220 with two 10GbE to the front and PCIe to the fabric side. Each one is designed with Octeon Plus CN5650 packet processors with 12 64-bit MIPS cores supporting up to 14.4 billion MIPS64 instructions per second (14.4 GOPS). They are designed with high-density, high-bandwidth serial IO technology, and are optimised for layer 4 to layer 7 data and security processing for 3G/4G BTS, RNC, xGSN and media gateway applications.

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